Interrupts

What is an interrupt?

Consider the following knock-knock joke:

Joker: "Knock, knock"

Innocent Person: "Who's there?"

Joker: "Interrupting cow"

Innocent Person: "Interrupting co..."

Joker: "Mooooo" (while the innocent person is responding)

We started this discussion of interrupts with a knock knock joke because it captures the essence of what an interrupt is in an embedded system. Consider the main loop of the program as the "Innocent Person" and the event (e.g., sensor) as the "Joker". The Joker causes the normal routine of the knock knock joke to be broken by the event of the punchline delivery (interrupt).

When an event in a system triggers an interrupt, the program momentarily breaks from whatever it is currently doing in the main loop, executes code in an interrupt service routine, and returns to the place where it left off in the main loop. Since most microcontrollers can only handle one software task at a time, using interrupts allows multiple things to be monitored at the same time.

What is an interrupt service routine?

An interrupt service routine (abbreviated ISR) is the separate program code that is executed after an interrupt is triggered. It is similar to calling a function (except that the calling mechanism is by interrupt, rather than explicit call in the code).

What are the different types of interrupts?

• Internal interrupt. Internal interrupts are created internally by the microcontroller. For example, when the UART receives a byte from an external sensor, it could trigger an interrupt.
• External interrupt. External interrupts are created externally to the microcontroller and are usually associated with external interrupt pins. For example, a button could be attached to a microcontroller pin and when the pin changes state, an interrupt could be triggered.

How does interrupt priority work?

Since interrupts can happen at nearly any time, there is a possibility that interrupts from two or more different sources can be generated at the same time. If the microcontroller finds pending interrupts from multiple different sources, it will use the programmer-assigned priorities for each interrupt source to determine which interrupt service routine to run first. Once the first interrupt is serviced, additional interrupts will be serviced in priority order.

How do I create a UML diagram for an interrupt service routine?

An example UML activity diagram for an interrupt-based system is shown in Figure 1 below.

For more information on UML, please see the What is Unified Modeling Language™ (UML®)? blog post.

What is the general process for enabling interrupts on a microcontroller?

Interrupts are typically active in a specific region of code defined by the programmer. Before the region of code where interrupts should be active, interrupts must be enabled (typically one or more lines of code specific to the microcontroller). After the region of code where interrupts should be active, interrupts must be disabled (typically one or more lines of code specific to the microcontroller).

References

• https://www.techopedia.com/definition/7772/internal-interrupt
• https://www.techopedia.com/definition/7115/external-interrupt
• http://www.scriptoriumdesigns.com/embedded/interrupts.php

Based on a blog entry written by Kevin Nichols

Creating a custom SMD footprint manually in Cadence

Introduction

This tutorial will walk through the creation of a custom surface-mount device (SMD) footprint manually. A MCH3382 Power MOSFET from ON Semiconductor will be used as an example.

How do you create a custom SMD pad manually in Cadence?

1. First, find the soldering footprint (sometimes named slightly differently, depending on manufacturer) in the component datasheet (see Figure 1).

Figure 1: Recommended soldering footprint for MCH3382 Power MOSFET

2. In Windows, open Pad Editor in the Cadence folder in the Start Menu. The Pad Editor window will appear (see Figure 2). The pad editor will allow you to create a padstack for the three individual pads in the footprint. Select "SMD Pin" under "Select padstack usage:" and select "Rectangle" under "Select the default pad geometry".

Figure 2: Pad Editor main window

3. In the "Units" section of the Pad Editor window (located in the bottom left corner), change the units to match the units in the component datasheet (see Figure 2). For the MCH3382, the footprint is in millimeters (mm).

4. Click the Design Layers tab and select the BEGIN LAYER (see Figure 3). Choose a Geometry of Rectangle and enter the width and height (found in the component data sheet) of a single pad.

Figure 3: Layers tab with BEGIN LAYER and Rectangle Pad selected

5. Save the padstack in the same location as your custom symbols. The following folder is the default:

C:\Program Files\Cadence\SPB_17.2\share\pcb\pcb_lib\symbols

6. Repeat steps 1 - 5 for any additional different pads in your component. You do not need to recreate the same pad if it is used multiple times in a single footprint.

How do you create a custom SMD footprint manually in Cadence?

1. Open PCB Editor and create a "New Drawing". Name the drawing after the package name, and set the "Drawing Type" to Package symbol (see Figure 4). Click OK.

Figure 4: New Drawing dialog box

2. Select the Color Picker to adjust the footprint colors to contrast against the black background (see Figure 5).

Figure 5: Color Dialog with all subclasses set to white for better contrast

3. In the Color selection, select white and double-click on the white box beside the All subclass to set all of the subclasses to white (see Figure 5). Click OK.

4. Choose Setup > Grids... to adjust the grid layout and spacing. In the Define Grid dialog, check the "Grids On" checkbox, enter 0.1 for the Spacing in both the x and y dimensions, and click OK (see Figure 6).

Figure 6: Define Grid dialog

5. Zoom in and find the white origin mark

6. Choose Layout > Pins and click on the "Options" tab on the right side of the screen (see Figure 7).

Figure 7: Options tab for the Pin layout tool

7. Click the "..." button next to "Padstack" and select the padstack that you made in the first part of this tutorial.

8. Determine an origin for your footprint based on the measurements in the datasheet. For the MCH3382, the origin will be where the vertical and horizontal measurement lines intersect in the bottom center of the footprint (see Figure 8).

Figure 8: Recommended soldering footprint for MCH3382 Power MOSFET

9. In the Command window at the bottom of the screen, type x -65 0 to place the first pad to the left of the origin. Type x 65 0 to place the second pad to the right of the origin, and x 0 210 to place the third pad above.

10. Next, add a box around the footprint so that it is clear the pads are related when laying out the printed circuit board. Select the Rectangle tool in the toolbar, and click the Options tab on the right side of the screen. Set the "Active Class and Subclass" to Package Geometry and Assembly_Top, respectively.

11. In the Command window at the bottom of the screen, type x -80 0 and press return to place the left corner of the box. Then, type x 80 210 to place the top right corner of the box. Right-click and select "Done". The footprint should now look like Figure 9.

Figure 9: Footprint after adding pads

12. Next, we need to add a reference designator that will be visible in the PCB layout. Choose Layout > Labels > RefDes. Select the center of the component and type "U?". Right-click and select "Done". The footprint should now look like Figure 10.

Figure 10: Footprint after adding reference designator

13. Save and close PCB Editor. You have successfully made a custom SMD footprint!

Based on a tutorial by Aaron Dolgin, updated by Sheena Benson (2/2020)

Creating Custom Footprints

You can try to find existing footprints for components, but most components will require custom footprints.

If you are not able to find an existing footprint for a component, then you will need to make a custom footprint. In order to make a custom footprint, you will need a datasheet for the component that includes mechanical dimensions of the component and footprint.

The process for creating a footprint is as follows:

1. Create a custom padstack for the component. A padstack is a design for the exposed copper surface area for each hole or pad on the board where the component is mounted and soldered.
2. Create a custom footprint for the component. There are two ways to do this:
1. Creating a custom footprint using Package Designer - useful for symmetric ICs (e.g., microcontrollers). Does not work well for parts that have mechanical or thermal pads or non-symmetric packages (e.g., voltage regulators or MOSFETs)
2. Creating a custom footprint manually / creating a custom SMD footprint manually
3. Update the library search path in Design Entry CIS
4. Update the library search path in PCB Editor

Figure 1: Video walkthrough of creating a custom footprint (by Ryan Sparks, 2020)

Finding existing PCB footprints for Cadence PCB Editor

Where can I find a list of existing PCB footprints for Cadence PCB Editor?

While Cadence does have some built-in footprint libraries, they are limited due to the hundreds of thousands of different parts in existence. Additionally, most companies make their own footprints to match the specific manufacturing processes that they use.

In most cases, it is easier and faster to build your own custom footprints for all components. However, there are some built-in libraries that can be found in the following directory:

C:\Cadence\SPB_17.4-silent\share\pcb\pcb_lib\symbols

Within this folder, you can double-click on the .dra files to see footprints and the .pad files to see padstacks in PCB Editor.

Additionally, there is a footprints document that will show you most of the footprints that exist in the library.

What are the most commonly used built-in padstacks?

There are a number of useful built-in through-hole padstacks located in:

C:\Cadence\SPB_17.4-silent\share\pcb\pcb_lib\symbols

that follow the naming convention:

pad(number1)(circle/square)(number2)d
where

• "number1" is the outer diameter of the copper ring outlining the pad (see Figure 1, blue ring),
• "circle/square" is the shape of the pad (cir is most common for this class),
• "number2" is the diameter of the hole in the center of the pad (see Figure 1, red circle)

Figure 1: Example through-hole Padstack, where the blue ring is copper and the red is the hole

For example, pad93cir56d.pad is a padstack with an outer copper ring diameter of 93 mils (not mm), and a center hole diameter of 56 mils.

For surface-mount padstacks, it is easiest to make your own using the Padstack Editor application.

What are the most commonly used built-in footprints?

First, look in the manufacturer's datasheet for each component and identify the package type and footprint dimensions. Package type information is typically near the beginning or end of the datasheet. Footprint dimensions are typically near the end of the datasheet.

Once you have identified the package type and footprint dimensions, there are a number of useful built-in through-hole and surface mount footprints located in:

C:\Cadence\SPB_17.4-silent\share\pcb\pcb_lib\symbols

Capacitors (through-hole)

• cap196 - cylindrical vertical-mount capacitor (e.g., electrolytic, tantalum) with 100-mil center-to-center spacing between pins
• cap300 - circular flat or rectangular vertical-mount capacitor (e.g., ceramic, film) with 300-mil center-to-center spacing between pins
• cap400 - axial horizontal-mount capacitor with 400-mil center-to-center spacing between pins
• cap600 - axial horizontal-mount capacitor with 600-mil center-to-center spacing between pins
• cap1000 - axial horizontal-mount capacitor with 1000-mil center-to-center spacing between pins
• cap1500 - axial horizontal-mount capacitor with 1500-mil center-to-center spacing between pins

Capacitors (surface mount)

• smc0805 - rectangular surface mount capacitor of size 0805 (0.08" x 0.05")
• smc1206 - rectangular surface mount capacitor of size 1206 (0.12" x 0.06")
• smc1210 - rectangular surface mount capacitor of size 1210 (0.12" x 0.10") 
• smc1812 - rectangular surface mount capacitor of size 1812 (0.18" x 0.12")

Diodes, inductors, resistors, and other axial-lead components (through-hole, horizontal mount)

• res400 - resistor with a 400-mil center-to-center spacing between holes
• res500 - resistor with a 500-mil center-to-center spacing between holes
• res600 - resistor with a 600-mil center-to-center spacing between holes
• res800 - resistor with a 800-mil center-to-center spacing between holes
• res1000 - resistor with a 1000-mil center-to-center spacing between holes

Headers and Jumpers (through hole)

• jumper1 - 1-pin header
• jumper2 - 2-pin header with 100-mil center-to-center spacing between pins
• jumper3 - 3-pin single-row header with 100-mil center-to-center spacing between pins
• jumper4 - 4-pin single-row header with 100-mil center-to-center spacing between pins
• jumper5 - 5-pin single-row header with 100-mil center-to-center spacing between pins
• jumper8 - 8-pin (4x2) double-row header with 100-mil center-to-center spacing between pins
• jumper14 - 14-pin (7x2) double-row header with 100-mil center-to-center spacing between pins
• jumper16 - 16-pin (8x2) double-row header with 100-mil center-to-center spacing between pins

Resistors (surface mount)

• smr0805 - rectangular surface mount resistor of size 0805 (0.08" x 0.05")
• smr1206 - rectangular surface mount resistor of size 1206 (0.12" x 0.06")
• smr1210 - rectangular surface mount resistor of size 1210 (0.12" x 0.10") 
• smr2010 - rectangular surface mount resistor of size 2010 (0.20" x 0.10")
• smr2512 - rectangular surface mount resistor of size 2512 (0.25" x 0.12")

Test Points (used to provide easy access for a multimeter or oscilloscope probe) (through hole)

• tp1 - square pad with round hole in the middle

Transistor Outline (TO) Package Types (through hole)

• to(number), where "number" is the number of the specific to case style from the component data sheet (e.g., a transistor with a to92 package type)

If your package type and footprint dimensions do not match one of those listed above, then you must create your own custom footprint.

Running Design Rules Check in Cadence PCB Editor

What is a Design Rules Check?

Design Rules Check (DRC) is a tool that looks for a limited set of errors in PCB designs, and generates error messages to help you identify and fix the problem(s). A design that passes a DRC is not necessarily error-free, but rather has passed the limited set of tests that DRC conducts. You can (and should) run a DRC in both Design Entry CIS and PCB Editor, and they will look for different types of errors.

How do you run a Design Rules Check in PCB Editor?

1. In PCB Editor, choose Tools > Update DRC (see Figure 1).

Figure 1: Update DRC menu option

2. If no DRC errors are detected, then the command window at the bottom of the screen will look similar to Figure 2. If errors appear in the command window, it is recommended that you correct them prior to continuing with your design.

Figure 2: Error-free command window after a DRC operation

How do you check for unconnected pins in PCB Editor?

1. In PCB Editor, choose Tools > Reports... (see Figure 3). The "Reports" dialog box will appear (see Figure 4).

Figure 3: Reports menu option

2. In the "Reports" dialog box under "Available Reports, select "Unconnected Pins Report"and click "Generate Reports" (see Figure 4).

Figure 4: Reports dialog box

3. If no unconnected pin errors are detected, then the Unconnected Pins Report will look similar to Figure 5. If errors appear in the report, it is recommended that you correct them prior to continuing with your design.

Figure 5: Unconnected Pins Report

Exporting Solder Mask Layers from Cadence PCB Editor

What is a solder mask?

Solder mask is the thin polymer layer that is applied to a printed circuit board to insulate copper traces from unwanted connections. It is often green, red, or blue, and is put over all parts of a PCB except where components are to be soldered.

How do you create a solder mask layer in PCB Editor?

1. Export TOP, BOTTOM, and OUTLINE Gerber files for your design (see Exporting Gerber Files from Cadence).

2. In PCB Editor, open your completed design and choose Manufacture > Artwork... (see Figure 1). The "Artwork Control Form" will open (see Figure 2).

Figure 1: Manufacture > Artwork... menu option

Figure 2: Artwork Control Form

3. Right-click on any of the folders in the "Available films" section and select "Add Manual" (see Figure 3). The film naming dialog box will appear (see Figure 4).

Figure 3: Add Manual contextual menu option

4. In the film naming dialog box, name the new film name SoldermaskTop (or something similar, see Figure 4) and click OK. The "Subclass Selection" dialog box will appear (see Figures 5, 6, and 7).

Figure 4: Film naming dialog box

5. In the "Subclass Selection" dialog box, expand the DRC ERROR CLASS, PIN, and VIA CLASS folders and check the box next to SOLDERMASK_TOP in each folder (See Figures 5, 6, and 7). Click OK.

Figure 5: DRC ERROR CLASS

Figure 6: PIN

Figure 7: VIA CLASS

6. In "Artwork Control Form", ensure that "Film name" is SoldermaskTop and "Undefined line width" is 0.01 (see Figure 8).

Figure 8: Film name and undefined line width options

7. Repeat steps 3 - 6 to create a solder mask for the bottom layer, if desired.

8. Under "Available films", select both the SoldermaskTop and SoldermaskBottom and click "Create Artwork".

9. If successful, you will see the message in Figure 9.

Figure 9: Success!

Based on a tutorial by Seana O'Reilly

Creating a Ground Plane in Cadence PCB Editor

What is a ground plane?

A ground plane is a large area of copper in a printed circuit board design that is connected to ground on the power supply.

What are advantages of having a ground plane in your PCB layout?

1. Simpler circuit layout. All components with ground connections will automatically connect to the ground plane, rather than separate traces. Since most of your components will need to be connected to ground, this is a significant advantage.
2. Larger current capacity. Ground planes are typically larger in area than typical PCB traces, meaning they can conduct larger return currents. This means that the ground potential across different parts of your circuit will be more similar and stable.
3. Less electrical noise. When a digital component changes states (high -> low or low -> high), it creates electrical noise that travels throughout the circuit. Since ground planes have very low impedance, they "absorb" the electrical switching noise more effectively.
4. Separate analog and digital grounds. For some (e.g., audio) circuits, it is necessary to have separate analog and digital grounds. With ground planes, you can make one layer of the board an analog ground plane and the other layer a digital ground plane, and connect them at a single point to minimize the effects of digital switching noise on the analog circuitry.

What are disadvantages of having a ground plane in your PCB layout?

1. All traces and continuity must be carefully checked with a digital multimeter (DMM) before applying power to the board for the first time. (This is required even if you do not use a ground plane, but is even more important if you do.)
2. When soldering and testing PCBs, ground planes make it extremely easy to accidentally short traces to ground. If the PCB manufacturing process leaves any extra copper behind (e.g., from milling), a power or signal trace may be connected directly to ground and short out components or power supplies when powering up the board.
3. A DMM or oscilloscope probe can short a trace or component if the probe touches the powered trace and the ground plane simultaneously. Applying solder mask to the PCB will reduce (but not eliminate) this possibility.
4. Sometimes, "ground islands" are created where a part of the ground plane is isolated from the rest of the circuit. A fix for this problem is described later in this tutorial.

How do you create a ground plane in an existing PCB layout?

1. Start with a PCB layout that has a board layout, all components placed, and all traces routed except the ground traces (see example with ground traces in blue, Figure 1). As you can see, routing all of the ground traces in the example below would add a lot of complexity, so adding a ground plane is a good design option.

Figure 1: Example PCB layout with un-routed ground traces in blue

2. In the toolbar, click on the Add Rectangle tool (see Figure 2) and select the "Options" tab on the right side of the screen (see Figure 3). Do not draw a rectangle yet.

Figure 2: Add rectangle tool

Figure 3: Options tab for the Add Rectangle tool

3. In the Options tab, click on the "..." button (see Figure 4) near "Assign net name" and choose your ground net (see Figure 5). Click OK to close the "Select a net" dialog box.

Figure 4: "..." button to assign ground net name

Figure 5: "Select a net" dialog box

4. Draw a rectangle around all of the placed components. If the above steps were completed correctly, the blue rats nest connections should disappear and ground pins electrically connected to the ground plane (see example, Figure 6).

Figure 6: Ground rectangle placed

Figures 7 and 8 below show closeups "before ground plane" and "after ground plane" connections.

Figure 7: Closeup of board design before ground plane

Figure 8: Closeup of board design after ground plane

As you can see in Figure 8 above, the connections between the ground pins and the ground plane are very small (5 mils), making them a potential point of unreliability or failure in the design. Connections to power and ground should be a minimum of 20 mils, or larger if using higher currents (use a trace width calculator to determine the minimum size).

5. To increase the size of the connections between pins and the ground plane, choose Shape > Global Dynamic Params... (see Figure 9).

Figure 9: Global Dynamic Parameters menu option

6. Select the "Clearances" tab (see Figure 10) and update the oversize values to a larger number (20 mils or greater) to make the design easier to manufacture and test.

Figure 10: Clearances tab with updated oversize clearance values

7. Select the "Thermal relief connects" tab (see Figure 11) and update the thermal width to a larger number (20 mils, or greater for higher currents). Click "OK" to apply the changes.

Figure 11: Thermal relief connects tab with updated thermal width

Figures 12 and 13 below show closeups before and after the changes to the global dynamic parameters. Note that changes are applied to the entire design, not just a single pad.

Figure 12: Example pad before global dynamic parameters adjustments

Figure 13: Example pad after global dynamic parameters adjustments

How do I find and eliminate ground islands?

A "ground island" is a section of a ground plane that is isolated from the rest of the circuit. Ground islands can often be discovered through careful examination of a design with a ground plane, noticing where a rats nest wire still exists (see example, Figure 14).

Figure 14: Example "ground island"

A ground island can be fixed by adding a via between the ground island and the remainder of the ground plane (see example, Figure 15).

Figure 15: Repaired ground island

Figure 16: Completed PCB design with ground plane

What is a void, rubout, or anti-etch and when do I use one?

A void, rubout, or anti-etch is a place where the copper is fully removed from the PCB. A common use of rubouts is underneath Bluetooth or Wifi antennas (e.g., from a Photon or Argon) as having a ground plane underneath an antenna will effectively shield RF waves from reaching the antenna. At best this will mean reduced range for a wireless device, and at worst it will mean that the device will not connect wirelessly.

How do I create a rubout in Cadence?

 

1. First, make sure you have placed all of the components on your PCB (and ideally have not started routing traces yet, though this can still be done even if you have routed traces).

2. Choose Shape > Manual Void/Cavity and choose a shape of your liking (see Figure 17).

Figure 17: Anti-etch selection

3. Draw an anti-etch on the appropriate layer(s) in appropriate place(s) (e.g., underneath an antenna). If there are existing races or vias in the area of the anti-etch, you will need to move them. If you have ground (or power) planes on multiple layers, you should place an anti-etch on each of the copper layers (e.g., TOP and BOTTOM). See example in Figure 18.

Figure 18: Anti-etch example under a PSoC® 5 footprint

4. To delete an anti-etch, you need to use the special delete tool in the Manual Void/Cavity menu (see Figure 19).

Figure 19: Delete tool for manual void/cavity

5. When generating your final Gerber files, you will need to add these anti-etches to the layers in the Artwork Control Form in order for them to be manufactured (see How do I export Gerber files from Cadence?).

Additional Resources

• Tutorial on Split Planes from parsysEDA

Based on a tutorial by Cody Van Cleve and updated by Jacob Lara in 2020.

Manual Routing in Cadence PCB Editor

How do I manually route a design in PCB Editor?

Your design should have a board outline and components placed, and blue lines (the "rats nest") between the components (see example, Figure 1). These blue lines are not traces, but rather points that are connected on your schematic and should be converted to traces in your design.

Figure 1: Board outline, components, and rats nest

1. Click the "Add Connect" button in the toolbar (see Figure 2)

Figure 2: Add Connect button

2. Go to the "Options" tab on the right side of the screen and change the settings for the trace as necessary (e.g., whether it will be on the top or bottom layer, which via will be used, and the line width) (see Figure 3).

Note: Make sure that your power and ground traces meet the recommended minimums

Figure 3: Options tab for Add Connect

3. Left click on a starting pin to start the trace, and left click on the ending pin to end the trace (see Figures 4 and 5).

Note: Avoid 90 degree angles when routing traces. They create electro-magnetic radiation that interferes with other circuits.

Figure 4: Left click to start a trace

Figure 5: Left click to end a trace

4. If you need to add a via (a conductive hole from one layer to another, allowing traces to cross on different layers), you can double-left click while you are placing the trace in order to change layers (see Figure 6).

Note: Vias reduce the reliability of a trace. It is recommended that you minimize the number of vias used in your design.

Figure 6: Double-left click to add a via

5. Continue the above process until all of the rats nest lines are routed (see example, Figure 7). Note that the power and ground traces are larger than the signal traces. This is important for having a fully-functioning design.

Figure 7: Example completed PCB design

Note: Manual routing of traces will almost always result in the best possible design. Auto-routing algorithms are notoriously poor and create board designs that are more complex and more difficult to debug.

Additional Resources

• How to Route Multiple Traces Simultaneously video from EMA Design Automation

Based on a tutorial by Seana O'Reilly